A regulator turning on is not the same as a rail being ready. Before the next stage of a laptop's start-up can begin, something has to confirm that the rail is up and within tolerance. That confirmation is the power-good signal. Laptops chain dozens of them together: each rail reports good, the next is enabled, and at the end of the chain the processor is released from reset. When a laptop stops partway through starting, a power-good that never goes high is very often the reason.
What a power-good signal is
Most regulators have a power-good output, often labelled PG, PGOOD or PWRGD. It goes high when the output voltage is within a window around its target, and stays low while the rail is starting, missing or out of range.
Key properties:
- Open-drain output. The regulator can only pull the line low; a pull-up resistor makes it high. No pull-up, no high level. The output type is explained under open-drain output.
- Delay. Many regulators wait a short time after the voltage is in range before releasing PG.
- Window. If the rail drifts too low or too high, PG drops again.
The general concept is described under power good.
How power-good signals form a chain
On a laptop board, power-good outputs feed other circuits:
| Power-good from | Typically goes to |
|---|---|
| Always-on rails | EC, or the chipset's deep-sleep well, as an "always-on rails OK" signal |
| Suspend and memory rails | The next regulator's enable, or a combined power-good |
| Run rails | A combined "all system power good" signal |
| Processor and graphics regulators | The chipset, as a "voltage regulator ready" signal |
Several power-goods are often combined with resistors, diodes or a small logic gate so that one signal goes high only when all of them are good. The chipset or EC waits for these combined signals before asserting its own outputs — for example the signal that releases the chipset's deep-sleep logic (RSMRST# on many boards, described under rsmrst) or the final "power OK" that lets the processor run.
The exact chain is board-specific. The schematic's power sequence page, covered in Power Sequence Pages in Laptop Schematics Explained, draws it step by step.
Measuring power-good signals
With the laptop powered and, for run-state signals, the power button pressed:
- Find the power-good in the schematic and the pull-up it uses.
- Measure it with a meter: high means good, low means not good (or not pulled up).
- If it is low, check the rail it reports on, then the pull-up.
A meter is fine for steady states. If a power-good goes high and then drops a fraction of a second later, a meter may miss it; the MIN/MAX function helps, an oscilloscope shows it clearly.
Why a power-good stays low
| Cause | How to recognise it |
|---|---|
| Rail missing | Measure the rail: absent |
| Rail out of the window | Rail present but too low or too high — check feedback and load |
| Missing pull-up supply | Rail fine, but the pull-up's supply rail is absent |
| Open or missing pull-up resistor | Rail fine, pull-up supply present, PG still low |
| Line pulled low by something else | Another device on a combined line holds it low |
| Damaged regulator PG output | Everything else fine; regulator holds PG low |
The combined-signal case is the trickiest. If four regulators share one power-good line, any one of them can hold the whole line low. Lifting the connections one at a time, or measuring each regulator's own PG pin before the combining parts, finds the culprit.
Reading power-good names in schematics
Power-good nets usually carry the rail name plus a suffix: _PG, _PGOOD, _PWRGD, _PWROK or _OK. Combined signals often have names like ALL_SYS_PWRGD, SYS_PWROK or VR_READY. Some boards use the opposite polarity and add # or _N. Follow the net across pages by its name: the regulator page shows where it starts, and the sequence or EC page shows where it ends up.
Timing and delays
Power-good outputs often include a deliberate delay of a few milliseconds after the rail is in range, and some boards add RC delays on top. The chipset also has timing requirements between its own inputs and outputs. A delay network with a failed capacitor can release a power-good too early or never; an intermittent power-good can produce a laptop that starts only sometimes. When a laptop starts on the second or third press, think of timing as well as levels.
A quick checklist
- Find the first power-good in the sequence that stays low.
- Measure the rail it reports on — present and in range?
- Measure the pull-up supply — present?
- Check the pull-up resistor and any combining parts.
- Measure each regulator's own PG pin if several share a line.
- Only then consider replacing the regulator.
Power-good inputs to the EC
Many boards route the early power-good signals to the embedded controller rather than straight to the next regulator. The EC reads them as inputs and decides, in firmware, when to raise the next enable. That has two consequences. First, the EC's own firmware is part of the chain: a corrupted EC firmware can ignore a perfectly good power-good. Second, the EC may add its own timeouts — if a power-good does not arrive within a set time, it switches everything off again, which looks like a laptop that starts and stops by itself. When an EC-routed power-good is present and the next enable still never comes, think about EC firmware before replacing hardware.
Power-good and enable together
Power-good and enable are two halves of the same mechanism: one regulator's power-good becomes the next regulator's enable, directly or through logic. When you trace a missing rail, look at its enable; when the enable is missing, look at the power-good that should have driven it. The enable side is covered in Enable Signals in Laptop Power Sequencing.
Example: stuck before the processor starts
A laptop powers on, the fan spins, but nothing else happens. All run rails measure correctly. The schematic shows the run regulators' power-goods combined into one "all power good" line with a 10 kΩ pull-up to a 3.3 V run rail. The line reads 0.2 V. Measuring each regulator's own PG pin before the combining resistors shows three high and one low — the 1.8 V regulator, whose output measures 1.62 V, below its window. Its feedback divider has a drifted resistor. Restoring the correct value brings the rail back to 1.8 V, its PG goes high, the combined line rises and the laptop starts.
FAQ
Is a power-good signal always active high?
Usually, but some designs invert signals along the chain. Check the schematic's naming and logic.
Why does my power-good read an intermediate voltage?
Something is pulling against the pull-up — partial leakage, a damaged pin, or two outputs fighting. Investigate each connected device.
Can a missing pull-up stop a laptop starting?
Yes. Without the pull-up, the line never rises even if every rail is perfect.
Do I need an oscilloscope?
Not for most faults. A meter catches steady problems; a scope helps with signals that rise and fall quickly.
What is the difference between enable and power-good?
Enable tells a regulator to start; power-good tells the system it has succeeded.
Bottom line
Power-good signals confirm that rails are healthy and trigger the next stage of start-up. They are open-drain outputs that need a pull-up, they drop if a rail leaves its window, and they are often combined. When a laptop stops partway through starting, find the first power-good that stays low, then check the rail it reports, its pull-up and everything sharing the line.