Every switched rail on a laptop board waits for permission. A regulator or load switch has an enable input, and until that input reaches its active level, the rail stays off even if everything else is perfect. Finding a missing rail therefore often comes down to one question: did the enable arrive? This guide explains where enables come from, how they are shaped and how to trace one that never shows up.
What an enable input does
An enable pin (EN, ON, SHDN# and similar) switches a regulator, load switch or MOSFET on or off. It has a threshold voltage: above it, the device runs; below it, the device is off. Thresholds are often lower than the logic supply — a regulator may turn on at around 1 V or so, so a 3.3 V logic signal enables it comfortably. The datasheet gives the exact value. The concept is described under enable signal.
Some enables are active-low: the device runs when the pin is pulled low. Their names usually carry a #, _N or bar. Logic polarity is covered under active-low signal.
Where enables come from
| Source | Examples (names vary) | Enables |
|---|---|---|
| Fixed pull-up to the input | EN tied to input through a resistor | Rails that should start as soon as power exists |
| Embedded controller | ALW_ON, EC_ON, SUSP, VR_ON | Always-on, suspend and processor rails |
| Chipset sleep-state signals | SLP_S5#, SLP_S4#, SLP_S3# | Suspend, memory and run rails |
| Another rail's power-good | xxx_PGOOD | The next rail in a chain |
| GPIO from chipset | DGPU_PWR_EN, WLAN_PWR_EN | Optional devices |
The chipset's sleep-state outputs are the backbone. In general:
SLP_S5#high → leaving soft-off.SLP_S4#high → at least sleep; enables memory supply rails.SLP_S3#high → running; enables run rails and memory termination.
These are active-low "sleep" signals: high means not in that sleep state. They are summarised under slp signals. On many boards the EC or a few transistors convert them into the enable names used by each regulator.
How enables are shaped
Enables are rarely a bare wire from source to pin:
- Series resistors protect pins and let designers swap signals.
- Pull-downs keep a regulator off while the source is not yet driving.
- RC networks delay an enable so rails start in order. A resistor and capacitor create a delay of roughly one time constant; RC Time Constant Calculator gives the numbers.
- Inverters — a small MOSFET or transistor flips the polarity when a source and a device disagree.
- Combining logic — two signals joined so a rail starts only when both are true.
Each of these is a place where corrosion or a missing part can block a good signal.
Tracing a missing enable
When a rail is missing and its regulator has input power:
- Measure the enable pin. Is it at its active level?
- If not, measure at the source — the EC pin, chipset pin or upstream power-good.
- If the source is fine but the pin is not, follow the path: series resistors, pull-downs, inverting transistors, RC parts. A corroded resistor or a shorted capacitor often sits here.
- If the source itself is inactive, ask why: the EC or chipset is waiting for something earlier in the sequence — usually a power-good that never arrived.
When the enable is active and the rail is still missing, the enable is not the problem: look at the regulator, its supply, its output for shorts and its feedback.
Reading the sequence
The schematic's power sequence diagram shows which enable follows which power-good. Following it from the top is the fastest way to find the first broken link. That diagram and how to read it are covered in Power Sequence Pages in Laptop Schematics Explained, and the power-good side in Power Good Signals and Why They Matter.
Load switches and MOSFET switches
Many run rails are not regulated at all: they are copies of an always-on rail, connected through a load switch or a P-channel MOSFET when the system starts. Their "enable" looks different:
- A load switch has a logic-level ON pin, like a regulator, and often a power-good or fault output.
- A discrete P-channel MOSFET is switched by pulling its gate low relative to its source. The gate is usually held high by a resistor to the source rail, and a small N-channel MOSFET or transistor driven by the enable signal pulls it down.
For the discrete version, measure the gate: with the rail supposed to be on, the gate should be well below the source voltage. A gate stuck at the source voltage means the driver stage is not pulling it down — check its enable input and the driver transistor. The opposite fault also happens: a leaky driver transistor or a corroded gate resistor can leave the MOSFET half on, so the switched rail sits at a fraction of its proper voltage even when the laptop is off. A switched rail that should be at zero in soft-off but reads a volt or two is worth checking for exactly this.
Measuring enables safely
Enable pins sit next to switching nodes, feedback pins and supply pins on small regulator packages. On a powered board, measure at a test point, at the series resistor or at a pull-up/pull-down resistor on the same net rather than on the chip's pin. The boardview shows every part on the net; pick the largest pad. A slip from an enable pin to a switch node can destroy the regulator and whatever drives the enable.
Common pitfalls
- Measuring in the wrong state. Run-rail enables are low in soft-off and sleep; press the power button first.
- Missing the polarity. An active-low enable at 0 V is on, not off.
- Ignoring thresholds. An enable at 0.9 V may be "on" for one regulator and "off" for another.
- Assuming the EC is dead. An EC that never raises an enable is often waiting for a condition — adapter detection, battery state, a power-good — rather than broken.
Example: no run rails after the power button
A laptop's always-on rails are fine, the power button produces a brief fan twitch, then nothing. The chipset raises SLP_S4# and SLP_S3# correctly. The run rails' regulators should be enabled by a signal derived from SLP_S3# through a small inverting MOSFET pair. At the regulators the enable stays at zero. With power removed, the gate of the second MOSFET reads near zero ohms to ground: a small capacitor on the gate, part of a delay network, is shorted. Replacing it lets the enable rise a few milliseconds after SLP_S3#, and the run rails come up.
FAQ
What does SLP_S3# mean?
It is the chipset's "sleep state S3" signal, active low. High means the system is running rather than asleep.
Why is my enable at an intermediate voltage?
Something is fighting the source — a leaky part, a pull-down that is too strong, or a damaged pin. Check each part on the line.
Can a regulator start without its enable?
Only if its enable is tied to the input. Otherwise, no.
Why do designers delay enables?
So rails start in the right order and the inrush of current is spread out.
Is the EC always the source of enables?
No. Many come from the chipset's sleep signals or from power-goods. The schematic shows each one.
Bottom line
Every switched rail waits for its enable. Measure it at the pin, compare with the source, and trace the path through resistors, pull-downs, inverters and delay networks. If the source is inactive, look earlier in the sequence for the power-good it is waiting for. Most missing rails are explained in a few measurements along that chain.